Design and Realization of ARINC659 BUS Monitor

This paper develops a particular architecture of designing a special test system(monitor) for 659 bus. The monitor is based on FPGA, can judge that whether the telecommunication of 659 bus interface chip is right, and also can monitor, record, diagnose and store all the bus messages. By FPGA verification, BM can monitor all of messages from 659 bus correctly, and report errors immediately, it is significant for debugging of bus telecommunications.